Over deze norm
This standard defines the following: a) Defines the structures in STIL for specifying the DC conditions for a DUT. Exaples of the DC conditions for device power supplies are DSP setup, power sequencing to the device, and power supply limiting/clamping. Examples of the DC conditions for commonly used signal references are VIL, VIH, VOL, VOH, IOL, IOH, VREF, VClampLow, and VClampHi.b) Defines strucuresin STIL such that the DC conditions may be specified either globally, by pattern burst, by pattern or by vector. c) Defines structures in STIL to allow specifications of the alternate DC levels. Examples of commonly used alternate levels are VIHH, VIPP, and VILL. d) Defines structures in STIL such that the DC levels and alternate levels can be selected within a period, much the same as timed format events.
||Norm voor Overzicht van Standard Test Interface Language (STIL) voor DC Niveau Specificaties
||Standard for Extensions to Standard Test Interface Language (STIL) for DC Level Specification